LMP91000SDX【PDF 5/24 页】SPECIALTY ANALOG CIRCUIT, PDSO14

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WRITE AND READ OPERATION

In order to start any read or write operation with the

LMP91000, MENB needs to be set low during the whole com-

munication. Then the master generates a start condition by

driving SDA from high to low while SCL is high. The start con-

dition is always followed by a 7-bit slave address and a Read/

Write bit. After these 8 bits have been transmitted by the mas-

ter, SDA is released by the master and the LMP91000 either

ACKs or NACKs the address. If the slave address matches,

the LMP91000 ACKs the master. If the address doesn't

match, the LMP91000 NACKs the master. For a write opera-

tion, the master follows the ACK by sending the 8-bit register

address pointer. Then the LMP91000 ACKs the transfer by

driving SDA low. Next, the master sends the 8-bit data to the

LMP91000. Then the LMP91000 ACKs the transfer by driving

SDA low. At this point the master should generate a stop con-

dition and optionally set the MENB at logic high level (refer

to Figure 3).

A read operation requires the LMP91000 address pointer to

be set first, also in this case the master needs setting at low

logic level the MENB, then the master needs to write to the

device and set the address pointer before reading from the

desired register. This type of read requires a start, the slave

address, a write bit, the address pointer, a Repeated Start (if

appropriate), the slave address, and a read bit (refer to

Figure 3). Following this sequence, the LMP91000 sends out

the 8-bit data of the register.

When just one LMP91000 is present on the I2C bus the MENB

can be tied to ground (low logic level).

30132572

(a) Register write transaction

30132571

(b) Pointer set transaction

30132570

(c) Register read transaction

FIGURE 3. READ and WRITE transaction

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